/**
 * @file    gt98xx_drv_i2c.h
 * @author  Giantec-Semi ATE
 * @brief   Header file of I2C driver module.
 * @version 0.1
 * 
 * @copyright Copyright (c) 2021 Giantec-Semi
 */

#ifndef GT98XX_DRIVERS_GT98XX_DRV_I2C_H_
#define GT98XX_DRIVERS_GT98XX_DRV_I2C_H_

#ifdef __cplusplus
  extern "C" {
#endif /* __cplusplus */

#include "gt98xx_drv_def.h"
#include "gt98xx_drv_conf.h"

/**
 * @addtogroup GT9881_Drivers
 * @{
 */

/**
 * @defgroup I2C_DRV I2C Drivers
 * @{
 */

/**
 * @defgroup I2C_DRV_Exported_Types I2C Drivers Exported Types
 * @{
 */

/**
 * @struct DrvI2cInitTypedef
 * @brief  I2C drivers init structure definition
 */
typedef struct tagDrvI2cInitTypedef {
  uint32_t mode;                  ///< I2C Mode
  uint32_t type_acknowledge;      ///< Type Acknowledge
  uint32_t addr_mode;             ///< Address mode
  uint32_t own_address;           ///< Own Address
  uint32_t trans_direction;       ///< Transfer Direction
  uint32_t speed_mode;            ///< Speed Mode
} DrvI2cInitTypedef;
/** @} I2C_DRV_Exported_Types */

/**
 * @defgroup I2C_DRV_Exported_Constants I2C Drivers Exported Constants
 * @{
 */

/**
 * @defgroup I2C_DRV_EC_BusSpeed I2C Bus Speed
 * @{
 */
#define DRV_I2C_BUSSPEED_STANDARD         (0x01)      ///< I2C Speed mode : Standard Mode
#define DRV_I2C_BUSSPEED_FAST             (0x02)      ///< I2C Speed mode  :Fast Mode
#define DRV_I2C_BUSSPEED_FASTPLUS         (0x03)      ///< I2C Speed mode : Fast Mode Plus
/** @} I2C_DRV_EC_BusSpeed */

/**
 * @defgroup I2C_DRV_EC_Mode I2C Drivers Mode
 * @{
 */
#define DRV_I2C_MODE_SLAVE                  (0x00U)     ///< Slave mode
#define DRV_I2C_MODE_MASTER                 I2C_SETUP_MASTER    ///< Master mode
/** @} I2C_DRV_EC_Mode */

/**
 * @defgroup I2C_DRV_EC_Address I2C Drivers Address
 * @{
 */
#define DRV_I2C_ADDRESS_7BIT                (0x00U)     ///< 7-bit address
#define DRV_I2C_ADDRESS_10BIT               I2C_SETUP_ADDRESSING    ///< 10-bit address
/** @} I2C_DRV_EC_Address */

/**
 * @defgroup I2C_DRV_EC_Cmd I2C Drivers Command
 * @{
 */
/**
 * @def   DRV_I2C_CMD_ISSUETRANS
 * @brief Issue a data transaction (Master only)
 */
#define DRV_I2C_CMD_ISSUETRANS              (0x01)

/**
 * @def   DRV_I2C_CMD_ACK
 * @brief Respond with an ACK to the received byte
 */
#define DRV_I2C_CMD_ACK                     (0x02)

/**
 * @def   DRV_I2C_CMD_NACK
 * @brief Respond with an NACK to the received byte
 */
#define DRV_I2C_CMD_NACK                    (0x03)

/**
 * @def   DRV_I2C_CMD_CLEARFIFO
 * @brief Clear the FIFO
 */
#define DRV_I2C_CMD_CLEARFIFO               (0x04)

/**
 * @def   DRV_I2C_CMD_RESET
 * @brief Reset the I2C controller (abort current transaction,
 *        set the SDA and SCL line to the open-drain mode, reset
 *        the Status Register and the Interrupt Enable Register,
 *        and empty the FIFO)
 */
#define DRV_I2C_CMD_RESET                   (0x05)
/** @} I2C_DRV_EC_Cmd */

/**
 * @defgroup I2C_DRV_EC_Size I2C Drivers Size
 * @{
 */
#define DRV_I2C_FIFOSIZE_2BYTES             (0x00U)     ///< 2 bytes
#define DRV_I2C_FIFOSIZE_4BYTES             (0x01U)     ///< 4 bytes
#define DRV_I2C_FIFOSIZE_8BYTES             (0x02U)     ///< 8 bytes
#define DRV_I2C_FIFOSIZE_16BYTES            (0x03U)     ///< 16 bytes
/** @} I2C_DRV_EC_Size */

/**
 * @defgroup I2C_DRV_EC_Direction I2C Drivers Transfer Direction
 * @{
 */
#define DRV_I2C_MST_RX_SLV_TX               (0x01U)     ///< Master : RX, Slave : TX
#define DRV_I2C_MST_TX_SLV_RX               (0x00U)     ///< Master : TX, Slave : RX
/** @} I2C_DRV_EC_Direction */

/** @} I2C_DRV_Exported_Constants */

/** @defgroup I2C_DRV_Exported_Functions I2C Drivers Exported Functions
 * @{
 */

/**
 * @defgroup I2C_DRV_EF_Configuration I2C Configuration Exported Functions
 * @{
 */

/**
 * @fn __STATIC_INLINE void DrvI2cEnable(I2cTypedef* i2c_instance)
 * @brief Enable I2C peripheral
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnable(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->SETUP, I2C_SETUP_IICEN);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisable(I2cTypedef* i2c_instance)
 * @brief Disable I2C peripheral
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisable(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->SETUP, I2C_SETUP_IICEN);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsEnabled(I2cTypedef* i2c_instance)
 * @brief Check if the I2C peripheral is enabled or disabled
 * 
 * @param[in] i2c_instance I2C instance
 * @return I2C is enabled or not
 * @retval 0 Disabled
 * @retval 1 Enabled
 */
__STATIC_INLINE uint32_t DrvI2cIsEnabled(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->SETUP, I2C_SETUP_IICEN) >> I2C_SETUP_IICEN_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cSetMode(I2cTypedef* i2c_instance, uint32_t mode)
 * @brief Set I2C mode
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] mode This parameter can be one of the following values:
 *            @arg @ref DRV_I2C_MODE_MASTER
 *            @arg @ref DRV_I2C_MODE_SLAVE
 */
__STATIC_INLINE void DrvI2cSetMode(I2cTypedef* i2c_instance, uint32_t mode) {
  MODIFY_REG(i2c_instance->SETUP, I2C_SETUP_MASTER, mode);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cGetMode(I2cTypedef* i2c_instance)
 * @brief Get I2C mode
 * 
 * @param[in] i2c_instance I2C instance
 * @return I2C mode
 * @retval DRV_I2C_MODE_MASTER I2C is in master mode
 * @retval DRV_I2C_MODE_SLAVE I2C is in slave mode
 */
__STATIC_INLINE uint32_t DrvI2cGetMode(I2cTypedef* i2c_instance) {
  return (uint32_t)READ_BIT(i2c_instance->SETUP, I2C_SETUP_MASTER);
}

/**
 * @fn __STATIC_INLINE void DrvI2cSetAddrMode(I2cTypedef* i2c_instance, uint32_t addr_mode)
 * @brief Set I2C address mode
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] addr_mode This parameter can be one of the following values:
 *            @arg @ref DRV_I2C_ADDRESS_7BIT
 *            @arg @ref DRV_I2C_ADDRESS_10BIT
 */
__STATIC_INLINE void DrvI2cSetAddrMode(I2cTypedef* i2c_instance, uint32_t addr_mode) {
  MODIFY_REG(i2c_instance->SETUP, I2C_SETUP_ADDRESSING, addr_mode);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cGetAddrMode(I2cTypedef* i2c_instance)
 * @brief Get I2C address mode
 * 
 * @param[in] i2c_instance I2C instance
 * @return I2C address mode
 * @retval DRV_I2C_ADDRESS_7BIT I2C address is 7bit
 * @retval DRV_I2C_ADDRESS_10BIT I2C address is 10bit
 */
__STATIC_INLINE uint32_t DrvI2cGetAddrMode(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->SETUP, I2C_SETUP_ADDRESSING) >> I2C_ADDR_ADDR_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cEnableDma(I2cTypedef* i2c_instance)
 * @brief Enable I2C DMA
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnableDma(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->SETUP, I2C_SETUP_DMAEN);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisableDma(I2cTypedef* i2c_instance)
 * @brief Disable I2C DMA
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisableDma(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->SETUP, I2C_SETUP_DMAEN);
}

/**
 * @fn __STATIC_INLINE void DrvI2cSetSclHighPeriod(I2cTypedef* i2c_instance, uint32_t period)
 * @brief Set high period of generated SCL clock
 * @note This field is only valid when the controller is in master mode
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] period The T_SCLHi value(must be greater than T_SP and T_HDDAT)
 */
__STATIC_INLINE void DrvI2cSetSclHighPeriod(I2cTypedef* i2c_instance, uint32_t period) {
  MODIFY_REG(i2c_instance->SETUP, I2C_SETUP_TSCLHI, period << 4);
}

/**
 * @fn __STATIC_INLINE void DrvI2cSetSclRatioLow(I2cTypedef* i2c_instance)
 * @brief Set low period of generated SCL clock
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cSetSclRatioLow(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->SETUP, I2C_SETUP_TSCLRATIO);
}

/**
 * @fn __STATIC_INLINE void DrvI2cClearSclRatioHigh(I2cTypedef* i2c_instance)
 * @brief Clear high period of generated SCL clock
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cClearSclRatioHigh(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->SETUP, I2C_SETUP_TSCLRATIO);
}

/**
 * @fn __STATIC_INLINE void DrvI2cSetDataHoldTime(I2cTypedef* i2c_instance, uint32_t data_hold_time)
 * @brief Set data hold time after SCL.
 *        Hold time = (4 + T_SP + T_HDDAT) * tpclk
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] data_hold_time Data hold time after SCL
 */
__STATIC_INLINE void DrvI2cSetDataHoldTime(I2cTypedef* i2c_instance, uint32_t data_hold_time) {
  MODIFY_REG(i2c_instance->SETUP, I2C_SETUP_THDDAT, data_hold_time << 16);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cGetDataHoldTime(I2cTypedef* i2c_instance)
 * @brief Get data hold time after SCL
 * 
 * @param[in] i2c_instance I2C instance
 * @return I2C data hold time 
 */
__STATIC_INLINE uint32_t DrvI2cGetDataHoldTime(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->SETUP, I2C_SETUP_THDDAT) >> I2C_SETUP_THDDAT_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cSetDataSetupTime(I2cTypedef* i2c_instance, uint32_t data_setup_time)
 * @brief Set data setup time before releasing the SCL
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] data_setup_time Data setup time
 */
__STATIC_INLINE void DrvI2cSetDataSetupTime(I2cTypedef* i2c_instance, uint32_t data_setup_time) {
  MODIFY_REG(i2c_instance->SETUP, I2C_SETUP_TSUDAT, data_setup_time << 24);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cGetDataSetupTime(I2cTypedef* i2c_instance)
 * @brief Get data setup time before releasing the SCL
 * 
 * @param[in] i2c_instance I2C instance
 * @return Data setup time 
 */
__STATIC_INLINE uint32_t DrvI2cGetDataSetupTime(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->SETUP, I2C_SETUP_TSUDAT) >> I2C_SETUP_TSUDAT_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cSetSpikesPulseWidth(I2cTypedef* i2c_instance, uint32_t spikes_pulse_width)
 * @brief Set I2C spikes pulse width
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] spikes_pulse_width Spikes pulse width
 */
__STATIC_INLINE void DrvI2cSetSpikesPulseWidth(I2cTypedef* i2c_instance, uint32_t spikes_pulse_width) {
  MODIFY_REG(i2c_instance->SETUP, I2C_SETUP_TSP, spikes_pulse_width << 21);
}

/**
 * @fn __STATIC_INLINE void DrvI2cAcknowledgeNextData(I2cTypedef* i2c_instance, uint32_t type_acknowledge)
 * @brief Respond with an ACK/NACK to the received byte
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] type_acknowledge This parameter can be one of the following values:
 *            @arg @ref DRV_I2C_CMD_ACK
 *            @arg @ref DRV_I2C_CMD_NACK
 */
__STATIC_INLINE void DrvI2cAcknowledgeNextData(I2cTypedef* i2c_instance, uint32_t type_acknowledge) {
  WRITE_REG(i2c_instance->CMD, type_acknowledge);
}

/**
 * @fn __STATIC_INLINE void DrvI2cReset(I2cTypedef* i2c_instance)
 * @brief Reset the I2C controller
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cReset(I2cTypedef* i2c_instance) {
  WRITE_REG(i2c_instance->CMD, DRV_I2C_CMD_RESET);
}

/**
 * @brief Clear the I2C FIFO
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cClearFifo(I2cTypedef* i2c_instance) {
  WRITE_REG(i2c_instance->CMD, DRV_I2C_CMD_CLEARFIFO);
}

/**
 * @fn __STATIC_INLINE void DrvI2cIssueTrans(I2cTypedef* i2c_instance)
 * @brief Issue a data transaction (Master only)
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cIssueTrans(I2cTypedef* i2c_instance) {
  WRITE_REG(i2c_instance->CMD, DRV_I2C_CMD_ISSUETRANS);
}

/**
 * @fn __STATIC_INLINE void DrvI2cSetFifoSize(I2cTypedef* i2c_instance, uint32_t fifo_size)
 * @brief Set I2C peripheral FIFO size
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] fifo_size This parameter can be one of the following values:
 *            @arg @ref DRV_I2C_FIFOSIZE_2BYTES
 *            @arg @ref DRV_I2C_FIFOSIZE_4BYTES
 *            @arg @ref DRV_I2C_FIFOSIZE_8BYTES
 *            @arg @ref DRV_I2C_FIFOSIZE_16BYTES
 */
__STATIC_INLINE void DrvI2cSetFifoSize(I2cTypedef* i2c_instance, uint32_t fifo_size) {
  MODIFY_REG(i2c_instance->CFG, I2C_CFG_FIFOSIZE, fifo_size);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cGetFifoSize(I2cTypedef* i2c_instance)
 * @brief Get I2C peripheral FIFO size
 * 
 * @param[in] i2c_instance I2C instance
 * @return I2C FIFO size
 * @retval DRV_I2C_FIFOSIZE_2BYTES I2C FIFO size is 2 bytes
 * @retval DRV_I2C_FIFOSIZE_4BYTES I2C FIFO size is 4 bytes
 * @retval DRV_I2C_FIFOSIZE_8BYTES I2C FIFO size is 8 bytes
 * @retval DRV_I2C_FIFOSIZE_16BYTES I2C FIFO size is 16 bytes
 */
__STATIC_INLINE uint32_t DrvI2cGetFifoSize(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->CFG, I2C_CFG_FIFOSIZE) >> I2C_CFG_FIFOSIZE_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cSetTransDirection(I2cTypedef* i2c_instance, uint32_t direction)
 * @brief Set this bit to determine the Transaction direction
 * @note Master: Set this bit to determine the direction
 *       for the next transaction.
 *       0: Transmitter 1: Receiver
 *       Slave: The direction of the last received transaction.
 *       0: Receiver    1: Transmitter
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] direction Transaction direction
 *            @arg @ref DRV_I2C_MST_RX_SLV_TX
 *            @arg @ref DRV_I2C_MST_TX_SLV_RX
 */
__STATIC_INLINE void DrvI2cSetTransDirection(I2cTypedef* i2c_instance, uint32_t direction) {
  MODIFY_REG(i2c_instance->CTRL, I2C_CTRL_DIR, direction << I2C_CTRL_DIR_Pos);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cGetTransDirection(I2cTypedef* i2c_instance)
 * @brief Get transaction direction

 * @param[in] i2c_instance I2C instance
 * @return I2C transaction direction
 * @retval DRV_I2C_MST_RX_SLV_TX I2C is RX in master mode, and TX in slave mode
 * @retval DRV_I2C_MST_TX_SLV_RX I2C is TX in master mode, and RX in slave mode
 */
__STATIC_INLINE uint32_t DrvI2cGetTransDirection(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->CTRL, I2C_CTRL_DIR) >> I2C_CTRL_DIR_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cGenerateStartCondition(I2cTypedef* i2c_instance)
 * @brief Generate a START condition at the beginning of transaction (Master mode only)
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cGenerateStartCondition(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->CTRL, I2C_CTRL_PHASESTART);
}

/**
 * @fn __STATIC_INLINE void DrvI2cGenerateStopCondition(I2cTypedef* i2c_instance)
 * @brief Generate a STOP condition at the end of a transaction (Master mode only)
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cGenerateStopCondition(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->CTRL, I2C_CTRL_PHASESTOP);
}

/**
 * @fn __STATIC_INLINE void DrvI2cGenerateAddrCondition(I2cTypedef* i2c_instance)
 * @brief Generate an Addr condition at the end of a transaction (Master mode only)
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cGenerateAddrCondition(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->CTRL, I2C_CTRL_PHASEADDR);
}

/**
 * @fn __STATIC_INLINE void DrvI2cGenerateDataCondition(I2cTypedef* i2c_instance)
 * @brief Generate a Data condition at the end of a transaction (Master mode only)
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cGenerateDataCondition(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->CTRL, I2C_CTRL_PHASEDATA);
}

/**
 * @fn __STATIC_INLINE void DrvI2cSetSlaveAddr(I2cTypedef* i2c_instance, uint32_t slave_addr) {
 * @brief Configure the slave address for transfer (master mode)
 * @note Changing these bits when START bit is set is not allowed
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] slave_addr This parameter must be a value between Min_Data=0x00 and Max_Data=0x3F.
 */
__STATIC_INLINE void DrvI2cSetSlaveAddr(I2cTypedef* i2c_instance, uint32_t slave_addr) {
  MODIFY_REG(i2c_instance->ADDR, I2C_ADDR_ADDR, slave_addr);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cGetSlaveAddr(I2cTypedef* i2c_instance)
 * @brief Get the slave address programmed for transfer
 * 
 * @param[in] i2c_instance I2C instance
 * @return Value between Min_Data=0x0 and Max_Data=0x3F
 */
__STATIC_INLINE uint32_t DrvI2cGetSlaveAddr(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->ADDR, I2C_ADDR_ADDR) >> I2C_ADDR_ADDR_Pos);
}

/** @} I2C_DRV_EF_Configuration */

/**
 * @defgroup I2C_DRV_EF_IT_Management I2C Drivers Interrupt Management Exported Functions
 * @{
 */

/**
 * @fn __STATIC_INLINE void DrvI2cEnableCmplIt(I2cTypedef* i2c_instance)
 * @brief Enable Completion Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnableCmplIt(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->INTEN, I2C_INTEN_CMPL);
}

/**
 * @fn __STATIC_INLINE void DrvI2cEnableByteRecvIt(I2cTypedef* i2c_instance)
 * @brief Enable Byte Receive Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnableByteRecvIt(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->INTEN, I2C_INTEN_BYTERECV);
}

/**
 * @fn __STATIC_INLINE void DrvI2cEnableByteTransIt(I2cTypedef* i2c_instance)
 * @brief Enable Byte Transmit Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnableByteTransIt(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->INTEN, I2C_INTEN_BYTETRANS);
}

/**
 * @fn __STATIC_INLINE void DrvI2cEnableStartIt(I2cTypedef* i2c_instance)
 * @brief Enable START Condition Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnableStartIt(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->INTEN, I2C_INTEN_START);
}

/**
 * @fn __STATIC_INLINE void DrvI2cEnableStopIt(I2cTypedef* i2c_instance)
 * @brief Enable STOP Condition Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnableStopIt(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->INTEN, I2C_INTEN_STOP);
}

/**
 * @fn __STATIC_INLINE void DrvI2cEnableArbLoseIt(I2cTypedef* i2c_instance)
 * @brief Enable Aarbitration Lose Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnableArbLoseIt(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->INTEN, I2C_INTEN_ARBLOSE);
}

/**
 * @fn __STATIC_INLINE void DrvI2cEnableAddrHitIt(I2cTypedef* i2c_instance)
 * @brief Enable Address Hit Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnableAddrHitIt(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->INTEN, I2C_INTEN_ADDRHIT);
}

/**
 * @fn __STATIC_INLINE void DrvI2cEnableFifoFullIt(I2cTypedef* i2c_instance)
 * @brief Enable FIFO Full Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnableFifoFullIt(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->INTEN, I2C_INTEN_FIFOFULL);
}

/**
 * @fn __STATIC_INLINE void DrvI2cEnableFifoHalfIt(I2cTypedef* i2c_instance)
 * @brief Enable FIFO Half Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnableFifoHalfIt(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->INTEN, I2C_INTEN_FIFOHALF);
}

/**
 * @fn __STATIC_INLINE void DrvI2cEnableFifoEmptyIt(I2cTypedef* i2c_instance)
 * @brief Enable FIFO Empty Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnableFifoEmptyIt(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->INTEN, I2C_INTEN_FIFOEMPTY);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisableCmplIt(I2cTypedef* i2c_instance)
 * @brief Disable Completion Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisableCmplIt(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->INTEN, I2C_INTEN_CMPL);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisableByteRecvIt(I2cTypedef* i2c_instance)
 * @brief Disable Byte Receive Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisableByteRecvIt(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->INTEN, I2C_INTEN_BYTERECV);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisableByteTransIt(I2cTypedef* i2c_instance)
 * @brief Disable Byte Transmit Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisableByteTransIt(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->INTEN, I2C_INTEN_BYTETRANS);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisableStartIt(I2cTypedef* i2c_instance)
 * @brief Disable START Condition Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisableStartIt(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->INTEN, I2C_INTEN_START);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisableStopIt(I2cTypedef* i2c_instance)
 * @brief Disable the STOP Condition Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisableStopIt(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->INTEN,I2C_INTEN_STOP);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisableArbLoseIt(I2cTypedef* i2c_instance)
 * @brief Disable Arbitration Lose Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisableArbLoseIt(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->INTEN, I2C_INTEN_ARBLOSE);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisableAddrHitIt(I2cTypedef* i2c_instance)
 * @brief Disable Address Hit Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisableAddrHitIt(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->INTEN, I2C_INTEN_ADDRHIT);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisableFifoFullIt(I2cTypedef* i2c_instance)
 * @brief Disable FIFO Full Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisableFifoFullIt(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->INTEN, I2C_INTEN_FIFOFULL);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisableFifoHalfIt(I2cTypedef* i2c_instance)
 * @brief Disable FIFO Half Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisableFifoHalfIt(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->INTEN, I2C_INTEN_FIFOHALF);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisableFifoEmptyIt(I2cTypedef* i2c_instance)
 * @brief Disable FIFO Empty Interrupt
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisableFifoEmptyIt(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->INTEN, I2C_INTEN_FIFOEMPTY);
}

/** @} I2C_DRV_EF_IT_Management */

/**
 * @defgroup I2C_DRV_EF_Flag_Management I2C Drivers Flag Management Exported Functions
 * @{
 */

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cGetSdaStatus(I2cTypedef* i2c_instance)
 * @brief Indicates the current status of the SDA line on the bus
 * 
 * @param[in] i2c_instance I2C instance
 * @return Current status of SDA line on the bus
 * @retval 0 Low
 * @retval 1 High
 */
__STATIC_INLINE uint32_t DrvI2cGetSdaStatus(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_LINESDA) >> I2C_STATUS_LINESDA_Pos);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cGetSclStatus(I2cTypedef* i2c_instance)
 * @brief Indicates the current status of the SCL line on the bus
 * 
 * @param[in] i2c_instance I2C instance
 * @return Current status of SCL line on the bus
 * @retval 0 Low
 * @retval 1 High
 */
__STATIC_INLINE uint32_t DrvI2cGetSclStatus(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_LINESCL) >> I2C_STATUS_LINESCL_Pos);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsGeneralCallEnabled(I2cTypedef* i2c_instance)
 * @brief Check if General Call is enabled or disabled
 * 
 * @param[in] i2c_instance I2C instance
 * @return If General Call is enabled or disabled
 * @retval 0 Disabled
 * @retval 1 Enabled
 */
__STATIC_INLINE uint32_t DrvI2cIsGeneralCallEnabled(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_GENCALL) >> I2C_STATUS_GENCALL_Pos);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsBusBusy(I2cTypedef* i2c_instance)
 * @brief Indicates that the bus is busy
 * @note Bus is busy when a START condition is on bus and
 *       it ends when a STOP condition is seen on bus.
 * 
 * @param[in] i2c_instance I2C instance
 * @return If the bus is busy
 * @retval 0 Not busy
 * @retval 1 Busy
 */
__STATIC_INLINE uint32_t DrvI2cIsBusBusy(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_BUSBUSY) >> I2C_STATUS_BUSBUSY_Pos);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsACK(I2cTypedef* i2c_instance)
 * @brief Indicates the type of the last
 * 
 * @param[in] i2c_instance I2C instance
 * @return The type of the last
 * @retval 0 NACK
 * @retval 1 ACK
 */
__STATIC_INLINE uint32_t DrvI2cIsACK(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_ACK) >> I2C_STATUS_ACK_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cClearCmplFlag(I2cTypedef* i2c_instance)
 * @brief Clear I2C CMPL flag
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cClearCmplFlag(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->STATUS, I2C_STATUS_CMPL);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsTransCompleteActive(I2cTypedef* i2c_instance)
 * @brief Indicates that Transaction Completion
 * 
 * @param[in] i2c_instance I2C instance
 * @return Transfer is complete or not
 * @retval 0 Transfer is not complete
 * @retval 1 Transfer is complete
 */
__STATIC_INLINE uint32_t DrvI2cIsTransCompleteActive(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_CMPL) >> I2C_STATUS_CMPL_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cClearByteRecvFlag(I2cTypedef* i2c_instance)
 * @brief Clear Byte Recv flag
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cClearByteRecvFlag(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->STATUS, I2C_STATUS_BYTERECV);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsByteRecvActive(I2cTypedef* i2c_instance)
 * @brief Indicates that a byte of data has been received.
 * 
 * @param[in] i2c_instance I2C instance
 * @return If one byte data has been received
 * @retval 0 No data received
 * @retval 1 One byte data received
 */
__STATIC_INLINE uint32_t DrvI2cIsByteRecvActive(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_BYTERECV) >> I2C_STATUS_BYTERECV_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cClearByteTransFlag(I2cTypedef* i2c_instance)
 * @brief Clear Byte Trans flag
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cClearByteTransFlag(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->STATUS, I2C_STATUS_BYTETRANS);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsByteTransActive(I2cTypedef* i2c_instance)
 * @brief Indicates that a byte of data has been transmitted
 * 
 * @param[in] i2c_instance I2C instance
 * @return If one byte data has been transmitted
 * @retval 0 Not transmitted
 * @retval 1 Transmitted
 */
__STATIC_INLINE uint32_t DrvI2cIsByteTransActive(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_BYTETRANS) >> I2C_STATUS_BYTETRANS_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cClearStartConditionFlag(I2cTypedef* i2c_instance)
 * @brief Clear Start Condition flag
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cClearStartConditionFlag(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->STATUS, I2C_STATUS_START);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsStartConditionActive(I2cTypedef* i2c_instance)
 * @brief Indicates that a START Condition or a repeated START condition has been transmitted/received
 * 
 * @param[in] i2c_instance I2C instance
 * @return If a START condition or a repeated START condition has been transmitted/received
 * @retval 0 No START condition or a repeated START condition has been transmitted/received
 * @retval 1 One START condition or a repeated START condition has been transmitted/received
 */
__STATIC_INLINE uint32_t DrvI2cIsStartConditionActive(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_START) >> I2C_STATUS_START_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cClearStopConditionFlag(I2cTypedef* i2c_instance)
 * @brief Clear Stop Condition flag
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cClearStopConditionFlag(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->STATUS, I2C_STATUS_STOP);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsStopConditionActive(I2cTypedef* i2c_instance)
 * @brief Indicates that a STOP Condition has been transmitted/received
 * 
 * @param[in] i2c_instance I2C instance
 * @return If one STOP condition has been transmitted/received
 * @retval 0 No STOP condition has been transmitted/received
 * @retval 1 One STOP condition has been transmitted/received
 */
__STATIC_INLINE uint32_t DrvI2cIsStopConditionActive(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_STOP) >> I2C_STATUS_STOP_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cClearArbLoseFlag(I2cTypedef* i2c_instance)
 * @brief Clear Arb Lose Flag
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cClearArbLoseFlag(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->STATUS, I2C_STATUS_ARBLOSE);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsArbLoseActive(I2cTypedef* i2c_instance)
 * @brief Indicates that the controller has lost the bus arbitration (master mode only).
 * 
 * @param[in] i2c_instance I2C instance
 * @return If the controller has lost the bus arbitration
 * @retval 0 Not lost
 * @retval 1 Lost
 */
__STATIC_INLINE uint32_t DrvI2cIsArbLoseActive(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_ARBLOSE) >> I2C_STATUS_ARBLOSE_Pos);
}

/**
 * @fn __STATIC_INLINE void DrvI2cClearAddrHitFlag(I2cTypedef* i2c_instance)
 * @brief Clear Addr Hit flag
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cClearAddrHitFlag(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->STATUS, I2C_STATUS_ADDRHIT);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsAddrHitActive(I2cTypedef* i2c_instance)
 * @brief Master: indicates that a slave has responded to the transaction. 
 *        Slave: indicates that a transaction is targeting the controller (including the General Call).
 * 
 * @param[in] i2c_instance I2C instance
 * @return If Addr Hit is active
 * @retval 0 Deactive
 * @retval 1 Active
 */
__STATIC_INLINE uint32_t DrvI2cIsAddrHitActive(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_ADDRHIT) >> I2C_STATUS_ADDRHIT_Pos);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsFifoHalfActive(I2cTypedef* i2c_instance)
 * @brief Transmitter: Indicates that the FIFO is half-full.
 *        Receiver: Indicates that the FIFO is half-empty.
 * 
 * @param[in] i2c_instance I2C instance
 * @return If FIFO is half
 * @retval 0 FIFO has not reached half
 * @retval 1 FIFO has reached half
 */
__STATIC_INLINE uint32_t DrvI2cIsFifoHalfActive(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_FIFOHALF) >> I2C_STATUS_FIFOHALF_Pos);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsFifoFullActive(I2cTypedef* i2c_instance)
 * @brief Indicates that the FIFO is full
 * 
 * @param[in] i2c_instance I2C instance
 * @return If FIFO is full
 * @retval 0 FIFO is not full
 * @retval 1 FIFO is full
 */
__STATIC_INLINE uint32_t DrvI2cIsFifoFullActive(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_FIFOFULL) >> I2C_STATUS_FIFOFULL_Pos);
}
/**
 * @fn __STATIC_INLINE uint32_t DrvI2cIsFifoEmptyActive(I2cTypedef* i2c_instance)
 * @brief Indicates that the FIFO is empty
 * 
 * @param[in] i2c_instance I2C instance
 * @return If FIFO is empty
 * @retval 0 FIFO is not empty
 * @retval 1 FIFO is empty
 */
__STATIC_INLINE uint32_t DrvI2cIsFifoEmptyActive(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->STATUS, I2C_STATUS_FIFOEMPTY) >> I2C_STATUS_FIFOEMPTY_Pos);
}

/** @} I2C_DRV_EF_Flag_Management */

/**
 * @defgroup I2C_DRV_EF_Data_Management I2C Drivers Data Management Exported Functions
 * @{
 */

/**
 * @fn __STATIC_INLINE void DrvI2cSetDataCount(I2cTypedef* i2c_instance, uint32_t data_count)
 * @brief Set transferred data count
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] data_count
 */
__STATIC_INLINE void DrvI2cSetDataCount(I2cTypedef* i2c_instance, uint32_t data_count) {
  MODIFY_REG(i2c_instance->CTRL, I2C_CTRL_DATACNT, data_count);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cGetDataCount(I2cTypedef* i2c_instance)
 * @brief Get transferred data count
 * 
 * @param[in] i2c_instance I2C instance
 * @return Transferred data count
 */
__STATIC_INLINE uint32_t DrvI2cGetDataCount(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->CTRL, I2C_CTRL_DATACNT) >> I2C_CTRL_DATACNT_Pos);
}

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cReceiveData(I2cTypedef* i2c_instance)
 * @brief Get received data
 * 
 * @param[in] i2c_instance I2C instance
 * @return Received data
 */
__STATIC_INLINE uint32_t DrvI2cReceiveData(I2cTypedef* i2c_instance) {
  return (uint32_t)READ_REG(i2c_instance->DATA);
}

/**
 * @fn __STATIC_INLINE void DrvI2cTransmitData(I2cTypedef* i2c_instance, uint32_t data)
 * @brief Transmit data
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] data Data to transmit
 */
__STATIC_INLINE void DrvI2cTransmitData(I2cTypedef* i2c_instance, uint32_t data) {
  WRITE_REG(i2c_instance->DATA, data);
}

/**
 * @fn __STATIC_INLINE void DrvI2cEnableAutoACK(I2cTypedef* i2c_instance)
 * @brief Enable I2C AutoACK
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cEnableAutoACK(I2cTypedef* i2c_instance) {
  CLEAR_BIT(i2c_instance->INTEN, I2C_INTEN_BYTERECV);
}

/**
 * @fn __STATIC_INLINE void DrvI2cDisableAutoACK(I2cTypedef* i2c_instance)
 * @brief Disable I2C AutoACK
 * 
 * @param[in] i2c_instance I2C instance
 */
__STATIC_INLINE void DrvI2cDisableAutoACK(I2cTypedef* i2c_instance) {
  SET_BIT(i2c_instance->INTEN, I2C_INTEN_BYTERECV);
}

/** @} I2C_DRV_EF_Data_Management */

/**
 * @fn __STATIC_INLINE uint32_t DrvI2cGetId(I2cTypedef* i2c_instance)
 * @brief Get I2C ID
 * 
 * @param[in] i2c_instance I2C instance
 * @return GT9881 I2C ID
 * @retval 0x2021
 */
__STATIC_INLINE uint32_t DrvI2cGetId(I2cTypedef* i2c_instance) {
  return (uint32_t)(READ_BIT(i2c_instance->IDREV, I2C_IDREV_ID) >> I2C_IDREV_ID_Pos);
}

/**
 * @defgroup I2C_DRV_EF_Init I2C Drivers Initialization and De-initialization Exported Functions
 * @{
 */

/**
 * @fn ErrorStatus DrvI2cDeInit(I2cTypedef* i2c_instance)
 * @brief De-initialize I2C registers
 * 
 * @param[in] i2c_instance I2C instance
 * @return An ErrorStatus enumeration value
 * @retval kSuccess: I2C registers are de-initialized
 * @retval kError: I2C registers are not de-initialized
 */
ErrorStatus DrvI2cDeInit(I2cTypedef* i2c_instance);

/**
 * @fn ErrorStatus DrvI2cInit(I2cTypedef* i2c_instance, DrvI2cInitTypedef* i2c_init_struct)
 * @brief Initialize I2C registers according to the specified parameters in @ref DrvI2cInitTypedef
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] i2c_init_struct pointer to a @ref DrvI2cInitTypedef structure that contians the
 *                            configuration information for the specified I2C peripheral
 * @return An ErrorStatus enumeration value
 * @retval kSuccess: I2C registers are de-initialized
 * @retval kError: I2C registers are not de-initialized
 */
ErrorStatus DrvI2cInit(I2cTypedef* i2c_instance, DrvI2cInitTypedef* i2c_init_struct);

/**
 * @fn void DrvI2cStructInit(DrvI2cInitTypedef* i2c_init_struct)
 * @brief Set each @ref DrvI2cInitTypedef field to default value
 * 
 * @param[out] i2c_init_struct pointer to a @ref DrvI2cInitTypedef structure
 *             whose field will be set to default values
 */
void DrvI2cStructInit(DrvI2cInitTypedef* i2c_init_struct);

/**
 * @fn void DrvI2cSetBusSpeedMode(I2cTypedef* i2c_instance, uint32_t speed_mode)
 * @brief Set i2c spped mode
 * 
 * @param[in] i2c_instance I2C instance
 * @param[in] speed_mode Speed mode
 */
void DrvI2cSetBusSpeedMode(I2cTypedef* i2c_instance, uint32_t speed_mode);

/** @} I2C_DRV_EF_Init */
/** @} IIC_Exported functions */
/** @} I2C_DRV */
/** @} GT9881_Drivers */

#ifdef __cplusplus
}
#endif /* __cplusplus */

#endif /* GT98XX_DRIVERS_GT98XX_DRV_I2C_H_ */
